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VLSI Design and Verification
No New Posts Architecture, Micro Architecture Design
Tools and methodology for defining chip architecture. 		325 Posts in
321 Topics 		Last post on Today at 04:48:53 PM
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No New Posts RTL Design
Discussions related to digital design, RTL Coding etc 		271 Posts in
258 Topics 		Last post on Today at 03:04:35 PM
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No New Posts RTL Verification
Functional RTL verification, Power analysis, Emulation, HVL's etc 		300 Posts in
296 Topics 		Last post on Today at 03:05:56 PM
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No New Posts Gate Level Verification
Netlist Simulation and debug 		286 Posts in
285 Topics 		Last post on Today at 04:01:33 PM
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VLSI Implementation
No New Posts Synthesis
Synthesis methodology, tools, issues etc 		293 Posts in
287 Topics 		Last post on Today at 04:29:03 PM
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No New Posts Timing Analysis
Static Timing Analysis methodologies, issues, tools etc 		294 Posts in
291 Topics 		Last post on Today at 04:04:09 PM
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No New Posts Design For Test and ATPG
DFT Tools and Methodologies, ATPG, BIST, JTAG, Test Patterns etc 		278 Posts in
277 Topics 		Last post on Today at 01:27:28 PM
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No New Posts Formal Verification
Formal verification methodology, tools 		289 Posts in
289 Topics 		Last post on Today at 04:32:42 PM
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VLSI Backend
No New Posts ASIC Library Design
Library cell design, library architecture, gate array design, standard cell design etc. 		301 Posts in
300 Topics 		Last post on Today at 03:41:43 PM
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No New Posts Chip Top
Pinout, Pads, Clock Plan etc 		293 Posts in
291 Topics 		Last post on Today at 10:19:16 AM
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No New Posts Floor Planning
Floor Planning Methodology, tools etc 		321 Posts in
321 Topics 		Last post on Today at 01:54:25 PM
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No New Posts Placement and Routing
Placement and Routing: Tools and methodology 		313 Posts in
313 Topics 		Last post on Today at 05:25:29 PM
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Analog/Mixed Signal Design
No New Posts Analog Design
Discuss issues in analog design. 		295 Posts in
295 Topics 		Last post on Today at 04:26:38 AM
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No New Posts Mixed Signal Design
Mixed Signal Design Issues. 		300 Posts in
299 Topics 		Last post on Today at 06:12:12 PM
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No New Posts High-Speed I/O Design
High-Speed I/O Design 		308 Posts in
308 Topics 		Last post on Today at 05:02:54 PM
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FPGA Validation
No New Posts FPGA Design
Design issues related to FPGA 		319 Posts in
319 Topics 		Last post on Today at 04:13:18 PM
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No New Posts FPGA Synthesis
FPGA synthesis tools, methodology, timing analysis etc 		317 Posts in
315 Topics 		Last post on Today at 03:21:13 PM
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No New Posts FPGA P&R
FPGA P&R, Timing Analysis, Bit File Generation, Programming. 		306 Posts in
306 Topics 		Last post on Today at 03:48:49 PM
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No New Posts FPGA Board Debugging
Methodology for board debug with FPGA designs. 		267 Posts in
267 Topics 		Last post on Today at 03:26:51 PM
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Jobs and Career
No New Posts VLSI Jobs
Job Postings, Job Requests etc 		266 Posts in
262 Topics 		Last post on Today at 12:53:36 PM
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No New Posts Interview Tips
Interview Q&A: Tech and Non-Tech 		56 Posts in
54 Topics 		Last post on July 28, 2010, 04:44:23 PM
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No New Posts Workplace Issues
Other issues: Visa, Career Progression, Office Politics, Gossip! 		18 Posts in
17 Topics 		Last post on Today at 04:04:55 AM
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General Category
No New Posts General Discussion
Feel free to talk about anything and everything in this board. 		139 Posts in
123 Topics 		Last post on Today at 09:43:26 AM
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No New Posts Introduction
Self Introduction, Resume Posting etc. 		13 Posts in
13 Topics 		Last post on Today at 02:05:00 AM
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