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VLSI Design and Verification
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Architecture, Micro Architecture Design
Tools and methodology for defining chip architecture.
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1679 Posts in
1679 Topics
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Last post on Today at 02:32:05 PM
in broker car in insurance ... by gimzibbd
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RTL Design
Discussions related to digital design, RTL Coding etc
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628 Posts in
618 Topics
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Last post on February 18, 2010, 07:57:15 AM
in questions read his answe... by portiabart
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RTL Verification
Functional RTL verification, Power analysis, Emulation, HVL's etc
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623 Posts in
620 Topics
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Last post on February 18, 2010, 06:54:09 AM
in baseball ontario level 3... by portiabart
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Gate Level Verification
Netlist Simulation and debug
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651 Posts in
651 Topics
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Last post on February 18, 2010, 02:13:16 AM
in feline heart murmur trea... by howardfran
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VLSI Implementation
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Synthesis
Synthesis methodology, tools, issues etc
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645 Posts in
643 Topics
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Last post on February 18, 2010, 07:06:40 AM
in wia financial management... by portiabart
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Timing Analysis
Static Timing Analysis methodologies, issues, tools etc
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620 Posts in
619 Topics
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Last post on February 18, 2010, 06:27:54 AM
in anheuser busch informati... by portiabart
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Design For Test and ATPG
DFT Tools and Methodologies, ATPG, BIST, JTAG, Test Patterns etc
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583 Posts in
583 Topics
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Last post on February 18, 2010, 06:14:06 AM
in welcome to the answer ma... by portiabart
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Formal Verification
Formal verification methodology, tools
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634 Posts in
634 Topics
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Last post on February 18, 2010, 04:23:21 AM
in penegra generic viagra s... by howardfran
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VLSI Backend
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ASIC Library Design
Library cell design, library architecture, gate array design, standard cell design etc.
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132 Posts in
131 Topics
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Last post on February 18, 2010, 05:58:19 AM
in algebra an investigative... by portiabart
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Chip Top
Pinout, Pads, Clock Plan etc
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145 Posts in
144 Topics
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Last post on February 18, 2010, 07:20:12 AM
in interveiw questions and ... by portiabart
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Floor Planning
Floor Planning Methodology, tools etc
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105 Posts in
105 Topics
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Last post on February 18, 2010, 07:06:46 AM
in san gabriel valley answe... by portiabart
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Placement and Routing
Placement and Routing: Tools and methodology
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114 Posts in
114 Topics
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Last post on February 18, 2010, 04:21:46 AM
in can nizoral shampoo caus... by howardfran
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FPGA Validation
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FPGA Design
Design issues related to FPGA
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117 Posts in
117 Topics
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Last post on February 18, 2010, 06:25:38 AM
in presentation of taks sho... by portiabart
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FPGA Synthesis
FPGA synthesis tools, methodology, timing analysis etc
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144 Posts in
142 Topics
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Last post on February 18, 2010, 06:13:51 AM
in answer to all riddles wa... by portiabart
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FPGA P&R
FPGA P&R, Timing Analysis, Bit File Generation, Programming.
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115 Posts in
115 Topics
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Last post on February 18, 2010, 02:14:19 AM
in diflucan in treatment of... by howardfran
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FPGA Board Debugging
Methodology for board debug with FPGA designs.
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139 Posts in
139 Topics
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Last post on February 18, 2010, 06:40:15 AM
in librarian job interview ... by portiabart
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Jobs and Career
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VLSI Jobs
Job Postings, Job Requests etc
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163 Posts in
159 Topics
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Last post on February 18, 2010, 06:08:19 AM
in slope intercept problems... by portiabart
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Interview Tips
Interview Q&A: Tech and Non-Tech
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121 Posts in
120 Topics
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Last post on February 18, 2010, 03:21:27 AM
in will mulls lawsuit again... by howardfran
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Workplace Issues
Other issues: Visa, Career Progression, Office Politics, Gossip!
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124 Posts in
123 Topics
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Last post on February 18, 2010, 06:13:35 AM
in cradle of filth dani's a... by portiabart
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